coreboot-3ba8246-dirty Wed Sep 7 20:49:58 UTC 2016 bootblock starting... Exception handlers installed. Configuring PLL at ff760030 with NF = 99, NR = 2 and NO = 2 (VCO = 1188000KHz, output = 594000KHz) Configuring PLL at ff760020 with NF = 32, NR = 1 and NO = 2 (VCO = 768000KHz, output = 384000KHz) Translation table is @ ff700000 Mapping address range [0x00000000:0x00000000) as uncached Creating new subtable @ff716c00 for [0xff700000:0xff800000) Mapping address range [0xff700000:0xff718000) as writethrough Configuring PLL at ff760000 with NF = 75, NR = 1 and NO = 1 (VCO = 1800000KHz, output = 1800000KHz) SF: Detected GD25Q32(B) with sector size 0x1000, total 0x400000 CBFS @ 20000 size e0000 CBFS: 'Master Header Locator' located CBFS at [20000:100000) CBFS: Locating 'fallback/romstage' CBFS: Found @ offset 80 size 59e4 coreboot-3ba8246-dirty Wed Sep 7 20:49:58 UTC 2016 romstage starting... RAM Config: 11. Starting SDRAM initialization... Configuring PLL at ff760010 with NF = 400, NR = 9 and NO = 2 (VCO = 1066666KHz, output = 533333KHz) Finish SDRAM initialization... Mapping address range [0x00000000:0xff000000) as writeback Mapping address range [0x10000000:0x10200000) as uncached CBMEM: IMD: root @ fefff000 254 entries. IMD: root @ feffec00 62 entries. SF: Detected GD25Q32(B) with sector size 0x1000, total 0x400000 CBFS @ 20000 size e0000 CBFS: 'Master Header Locator' located CBFS at [20000:100000) CBFS: Locating 'fallback/ramstage' CBFS: Found @ offset 5ac0 size 10f0c coreboot-3ba8246-dirty Wed Sep 7 20:49:58 UTC 2016 ramstage starting... SF: Detected GD25Q32(B) with sector size 0x1000, total 0x400000 FMAP: Found "FMAP" version 1.0 at 100000. FMAP: base = 0 size = 400000 #areas = 22 FMAP: area RO_VPD found FMAP: offset: 1f0000 FMAP: size: 65536 bytes FMAP: Found "FMAP" version 1.0 at 100000. FMAP: base = 0 size = 400000 #areas = 22 FMAP: area RW_VPD found FMAP: offset: 2f8000 FMAP: size: 32768 bytes FMAP: Found "FMAP" version 1.0 at 100000. FMAP: base = 0 size = 400000 #areas = 22 FMAP: area RO_VPD found FMAP: offset: 1f0000 FMAP: size: 65536 bytes FMAP: Found "FMAP" version 1.0 at 100000. FMAP: base = 0 size = 400000 #areas = 22 FMAP: area RW_VPD found FMAP: offset: 2f8000 FMAP: size: 32768 bytes Exception handlers installed. BS: BS_PRE_DEVICE times (us): entry 1 run 2 exit 1 BS: BS_DEV_INIT_CHIPS times (us): entry 2 run 3 exit 2 Enumerating buses... Show all devs... Before device enumeration. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 Compare with tree... Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 Root Device scanning... root_dev_scan_bus for Root Device CPU_CLUSTER: 0 enabled root_dev_scan_bus for Root Device done scan_bus: scanning of bus Root Device took 10793 usecs done BS: BS_DEV_ENUMERATE times (us): entry 2 run 32905 exit 1 Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 Setting resources... Root Device assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 Done allocating resources. BS: BS_DEV_RESOURCES times (us): entry 2 run 50236 exit 1 Enabling resources... done. BS: BS_DEV_ENABLE times (us): entry 2 run 2622 exit 1 Initializing devices... Root Device init ... SF: Detected GD25Q32(B) with sector size 0x1000, total 0x400000 FMAP: Found "FMAP" version 1.0 at 100000. FMAP: base = 0 size = 400000 #areas = 22 FMAP: area RW_ELOG found FMAP: offset: 27c000 FMAP: size: 16384 bytes ELOG: FLASH @0x00215798 [SPI 0x0027c000] ELOG: area is 4096 bytes, full threshold 3834, shrink size 1024 ELOG: Event(17) added with size 13 out: cmd=0x87: 03 6b 87 00 00 00 04 00 07 00 00 00 in-header: 03 d9 00 00 04 00 00 00 in-data: 00 20 00 00 out: cmd=0x17: 03 08 17 00 01 00 14 00 00 00 00 00 00 00 00 00 05 00 00 00 04 40 70 ff 75 7c 20 00 in-header: 03 d1 00 00 10 00 00 00 in-data: 70 00 00 00 15 00 00 00 00 00 00 00 00 ff 7f 19 elog_add_boot_reason: Normal mode boot, nothing interesting to log Root Device init finished in 74421 usecs CPU_CLUSTER: 0 init ... LCD framebuffer @10800000 Mapping address range [0x10800000:0x11000000) as uncached Attempting to setup EDP display. do not get hpd single, force hpd Extracted contents: header: 00 ff ff ff ff ff ff 00 serial number: 09 e5 6b 06 00 00 00 00 01 19 version: 01 04 basic params: 95 1a 0e 78 02 chroma info: 5d 40 94 5b 57 94 29 1c 50 54 established: 00 00 00 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 descriptor 1: 3e 1c 56 a0 50 00 16 30 30 20 36 00 00 90 10 00 00 1a descriptor 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1a descriptor 3: 00 00 00 fe 00 42 4f 45 20 44 54 0a 20 20 20 20 20 20 descriptor 4: 00 00 00 fe 00 4e 54 31 31 36 57 48 4d 2d 4e 32 33 0a extensions: 00 checksum: 3d Manufacturer: BOE Model 66b Serial Number 0 Made week 1 of 2015 EDID version: 1.4 Digital display 6 bits per primary color channel DisplayPort interface Maximum image size: 26 cm x 14 cm Gamma: 220% Check DPMS levels Supported color formats: RGB 4:4:4 First detailed timing is preferred timing Established timings supported: Standard timings supported: Detailed timings Hex of detail: 3e1c56a0500016303020360000901000001a Detailed mode (IN HEX): Clock 72300 KHz, 100 mm x 90 mm 0556 0586 05a6 05f6 hborder 0 0300 0303 0309 0316 vborder 0 +hsync -vsync Did detailed timing Hex of detail: 00000000000000000000000000000000001a Manufacturer-specified data, tag 0 Hex of detail: 000000fe00424f452044540a202020202020 ASCII string: BOE DT Hex of detail: 000000fe004e5431313657484d2d4e32330a ASCII string: NT116WHM-N23 Checksum Checksum: 0x3d (valid) Configuring PLL at ff760040 with NF = 241, NR = 10 and NO = 8 (VCO = 578400KHz, output = 72300KHz) clock recovery at voltage 0 pre-emphasis 0 channel eq at voltage 0 pre-emphasis 0 CPU_CLUSTER: 0 init finished in 513281 usecs Devices initialized Show all devs... After init. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 BS: BS_DEV_INIT times (us): entry 1 run 606412 exit 1 Finalize devices... Devices finalized BS: BS_POST_DEVICE times (us): entry 2 run 3489 exit 1 BS: BS_OS_RESUME_CHECK times (us): entry 2 run 3 exit 2 Writing coreboot table at 0xfefdc000 rom_table_end = 0xfefdc000 ... aligned to 0xfefe0000 0. 0000000000000000-00000000fefdbfff: RAM 1. 00000000fefdc000-00000000feffffff: CONFIGURATION TABLES out: cmd=0x87: 03 72 87 00 00 00 04 00 00 00 00 00 in-header: 03 d9 00 00 04 00 00 00 in-data: 00 20 00 00 Added 9 GPIOS size 264 Board ID: 6. RAM Config: 11. CBFS @ 20000 size e0000 CBFS: 'Master Header Locator' located CBFS at [20000:100000) FMAP: Found "FMAP" version 1.0 at 100000. FMAP: base = 0 size = 400000 #areas = 22 Wrote coreboot table at: fefdc000, 0x308 bytes, checksum 4cae coreboot table: 800 bytes. IMD ROOT 0. fefff000 00001000 IMD SMALL 1. feffe000 00001000 CONSOLE 2. fefde000 00020000 COREBOOT 3. fefdc000 00002000 IMD small region: IMD ROOT 0. feffec00 00000400 TIME STAMP 1. feffe920 000002e0 VPD 2. feffe760 000001be BS: BS_WRITE_TABLES times (us): entry 1 run 78575 exit 2 CBFS @ 20000 size e0000 CBFS: 'Master Header Locator' located CBFS at [20000:100000) CBFS: Locating 'fallback/payload' CBFS: Found @ offset 16a40 size 12185 Loading segment from rom address 0x01000000 code (compression=1) New segment dstaddr 0x43104040 memsize 0x104d900 srcaddr 0x1000038 filesize 0x1214d Loading segment from rom address 0x0100001c Entry Point 0x43104041 Bounce Buffer at fefa9000, 208688 bytes Loading Segment: addr: 0x0000000043104040 memsz: 0x000000000104d900 filesz: 0x000000000001214d lb: [0x0000000000200000, 0x0000000000219798) Post relocation: addr: 0x0000000043104040 memsz: 0x000000000104d900 filesz: 0x000000000001214d using LZMA [ 0x43104040, 431251ec, 0x44151940) <- 01000038 Clearing Segment: addr: 0x00000000431251ec memsz: 0x000000000102c754 dest 43104040, end 44151940, bouncebuffer fefa9000 Loaded segments BS: BS_PAYLOAD_LOAD times (us): entry 2 run 212601 exit 1 Jumping to boot code at 43104041(fefdc000) CPU0: stack: ff717580 - ff718000, lowest used address ff717b50, stack used: 1200 bytes Starting depthcharge on veyron_speedy... The GBB signature is at 0x43004020 and is: 24 47 42 42 vboot handoff pointer is NULL vboot_init:68 dev 0, rec 0, wp 1, lid 1, oprom 0 Calling VbInit(). VbInit() input flags 0x1264 gbb flags 0x0 cros_ec_init: CrosEC protocol v3 supported (544, 544) Google ChromeOS EC driver ready, id 'speedy_v1.1.2708-aa5bc06' Clearing the recovery request. VbSharedDataInit, 16384 bytes, header 1096 bytes VbInit sees recovery request = 0 VbInit now sets shared->recovery_reason = 0 TPM: Call RollbackFirmwareSetup(r0, d0) TPM: Startup 1.2 TPM (chip type slb9645tt device-id 0x1A) TPM: command 0x99 returned 0x0 TPM: Asserting physical presence TPM: command 0x4000000a returned 0x0 TPM: command 0x65 returned 0x0 TPM: Got flags disable=0, deactivated=0, nvlocked=1 TPM: TlclRead(0x1007, 10) TPM: command 0xcf returned 0x0 TPM: Firmware space sv2 f3 v20003 TPM: SetupTPM() succeeded TPM: RollbackFirmwareSetup 20003 VbInit() output flags 0xce VbInit() returning 0x0 Wipe memory regions: [0x00000000000000, 0x00000002000000) [0x00000002000200, 0x00000031f00000) [0x00000032000000, 0x00000043000000) [0x00000044151940, 0x000000fefdc000) Initializing DWC2 USB controller at 0xff580000. Initializing DWC2 USB controller at 0xff540000. Calling VbSelectFirmware(). LoadFirmware started... Checking key block signature... - sig_size=512, expecting 512 for algorithm 8 Verifying preamble. - sig_size=512, expecting 512 for algorithm 7 Preamble flags 0x0 Firmware 0 is valid. Saving kernel subkey to shared data: size 512, algo 8 VbSharedDataReserve 1032 bytes at 1096 Will boot firmware index 0 TPM: Set global lock TPM: TlclWrite(0x0, 0) TPM: command 0xcd returned 0x0 TPM: command 0x14 returned 0x0 TPM: SetTPMBootModeState boot mode PCR0 result 0 TPM: command 0x14 returned 0x0 TPM: SetTPMBootModeState HWID PCR1 result 0 Calling VbSelectAndLoadKernel(). VbEcSoftwareSync(devidx=0) VbEcSoftwareSync() check for RW update. EcUpdateImage() - Check for RW update EC-RW hash:35e04e84ca847cebcb21819b112e56340adc8c345c39c770d469ba0adf197e46 EC-RW hash address, size are 0x4335b9e0, 32. Hash = 35e04e84ca847cebcb21819b112e56340adc8c345c39c770d469ba0adf197e46 Expected hash:35e04e84ca847cebcb21819b112e56340adc8c345c39c770d469ba0adf197e46 VbEcSoftwareSync() jumping to EC-RW Timeout waiting for framing byte. Received invalid handshake 0 PARAM_LIMIT_POWER not supported by EC. TPM: TlclRead(0x1008, 13) TPM: command 0xcf returned 0x0 TPM: command 0x65 returned 0x0 TPM: RollbackKernelRead 30002 Entering VbBootDeveloper() backlight_update called but not implemented. VbAudioOpen() - ticks_per_msec is 1000 VbAudioOpen() - VbExBeep() is limited VbGetDevMusicNotes: use_short is 0, hdr is 0x0, maxsize is 0 VbGetDevMusicNotes: using 1 default notes VbAudioOpen() - note count 1 VbTryLoadKernel() start, get_info_flags=0x1 VbTryLoadKernel() found 0 disks VbSetRecoveryRequest(90) VbBootDeveloper() - no kernel found on USB max98090_device_init: Hardware revision:  max98090_set_sysclk: Clock at 12288000Hz rockchip_i2s_init: 16, 256, 2 VbSetRecoveryRequest(0) VbBootDeveloper() - trying fixed disk VbTryLoadKernel() start, get_info_flags=0x2 Man 000090 Snr 1461958034 Product HAG2e Revision 0.3 VbTryLoadKernel() found 1 disks VbTryLoadKernel() trying disk 0 Primary GPT header invalid! GptNextKernelEntry looking at new prio partition 1 GptNextKernelEntry s1 t5 p10 GptNextKernelEntry likes partition 1 Found kernel entry at 20480 size 65536 Checking key block signature... - sig_size=512, expecting 512 for algorithm 8 In RSAVerify(): Padding check failed! In RSAVerify(): Hash check failed! Invalid key block signature. Verifying key block signature failed. Checking key block hash only... Key version too old. - sig_size=256, expecting 256 for algorithm 4 Kernel preamble is good. Key block valid: 0 Combined version: 65537 - sig_size=256, expecting 256 for algorithm 4 Partition is good. In recovery mode or dev-signed kernel Updating GPT header 1 Updating GPT entries 1 Good_partition >= 0 VbTryLoadKernel() LoadKernel() = 0 backlight_update called but not implemented. TPM: Lock physical presence TPM: command 0x4000000a returned 0x0 VbSelectAndLoadKernel() returning 0 Boot policy: Match for type 0 with cmdline 1 Loading FIT. Image fdt@14 has 67669 bytes. Image fdt@13 has 67482 bytes. Image fdt@12 has 51172 bytes. Image fdt@11 has 48554 bytes. Image fdt@10 has 52193 bytes. Image fdt@9 has 44654 bytes. Image fdt@8 has 53796 bytes. Image fdt@7 has 51170 bytes. Image fdt@6 has 42069 bytes. Image fdt@5 has 61996 bytes. Image fdt@4 has 62279 bytes. Image fdt@3 has 43416 bytes. Image fdt@2 has 46566 bytes. Image fdt@1 has 46530 bytes. Image kernel@1 has 6372096 bytes. Compat preference: google,veyron-speedy-rev6 Config conf@14, kernel kernel@1, fdt fdt@14, compat google,nyan-blaze-rev10 google,nyan-blaze-rev9 google,nyan-blaze-rev8 google,nyan-blaze-rev7 google,nyan-blaze-rev6 google,nyan-blaze-rev5 google,nyan-blaze-rev4 google,nyan-blaze-rev3 google,nyan-blaze-rev2 google,nyan-blaze-rev1 google,nyan-blaze-rev0 google,nyan-blaze google,nyan nvidia,tegra124 Config conf@13, kernel kernel@1, fdt fdt@13, compat google,nyan-big-rev7 google,nyan-big-rev6 google,nyan-big-rev5 google,nyan-big-rev4 google,nyan-big-rev3 google,nyan-big-rev2 google,nyan-big-rev1 google,nyan-big-rev0 google,nyan-big google,nyan nvidia,tegra124 Config conf@12, kernel kernel@1, fdt fdt@12, compat google,veyron-speedy-rev9 google,veyron-speedy-rev8 google,veyron-speedy-rev7 google,veyron-speedy-rev6 (match) google,veyron-speedy-rev5 google,veyron-speedy-rev4 google,veyron-speedy-rev3 google,veyron-speedy-rev2 google,veyron-speedy google,veyron rockchip,rk3288 Config conf@11, kernel kernel@1, fdt fdt@11, compat google,veyron-pinky-rev2 google,veyron-pinky google,veyron rockchip,rk3288 Config conf@10, kernel kernel@1, fdt fdt@10, compat google,veyron-minnie-rev4 google,veyron-minnie-rev3 google,veyron-minnie-rev2 google,veyron-minnie-rev1 google,veyron-minnie-rev0 google,veyron-minnie google,veyron rockchip,rk3288 Config conf@9, kernel kernel@1, fdt fdt@9, compat google,veyron-mickey-rev8 google,veyron-mickey-rev7 google,veyron-mickey-rev6 google,veyron-mickey-rev5 google,veyron-mickey-rev4 google,veyron-mickey-rev3 google,veyron-mickey-rev2 google,veyron-mickey-rev1 google,veyron-mickey-rev0 google,veyron-mickey google,veyron rockchip,rk3288 Config conf@8, kernel kernel@1, fdt fdt@8, compat google,veyron-jerry-rev15 google,veyron-jerry-rev14 google,veyron-jerry-rev13 google,veyron-jerry-rev12 google,veyron-jerry-rev11 google,veyron-jerry-rev10 google,veyron-jerry-rev7 google,veyron-jerry-rev6 google,veyron-jerry-rev5 google,veyron-jerry-rev4 google,veyron-jerry-rev3 google,veyron-jerry google,veyron rockchip,rk3288 Config conf@7, kernel kernel@1, fdt fdt@7, compat google,veyron-jaq-rev5 google,veyron-jaq-rev4 google,veyron-jaq-rev3 google,veyron-jaq-rev2 google,veyron-jaq-rev1 google,veyron-jaq google,veyron rockchip,rk3288 Config conf@6, kernel kernel@1, fdt fdt@6, compat google,veyron-brain-rev0 google,veyron-brain google,veyron rockchip,rk3288 Config conf@5, kernel kernel@1, fdt fdt@5, compat google,pit-rev16 google,pit-rev15 google,pit-rev14 google,pit-rev13 google,pit-rev12 google,pit-rev11 google,pit-rev10 google,pit-rev9 google,pit-rev8 google,pit-rev7 google,pit-rev6 google,pit google,peach samsung,exynos5420 samsung,exynos5 Config conf@4, kernel kernel@1, fdt fdt@4, compat google,pi-rev16 google,pi-rev15 google,pi-rev14 google,pi-rev13 google,pi-rev12 google,pi-rev11 google,pi-rev10 google,pi google,peach samsung,exynos5800 samsung,exynos5 Config conf@3, kernel kernel@1, fdt fdt@3, compat google,spring samsung,exynos5250 samsung,exynos5 Config conf@2, kernel kernel@1, fdt fdt@2, compat google,snow-rev5 samsung,exynos5250 samsung,exynos5 Config conf@1 (default), kernel kernel@1, fdt fdt@1, compat google,snow-rev4 google,snow samsung,exynos5250 samsung,exynos5 Choosing best match conf@12. Shutting down all USB controllers. Exiting depthcharge with code 4 at timestamp: 8230674